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专利名称：Wiring substrate and manufacturing method
thereof
发明人：Muramatsu, Shigetsugu, Shinko Electronics
Industries Co., Ltd.,Kusama, Yasuhiko ShinkoElectronics Industries Co., Ltd.
申请号：EP08152800.2申请日：20080314公开号：EP1971194A2公开日：20080917
专利附图：
摘要：In a wiring substrate, a wiring pattern (40) is formed on a substrate (30). Aninsulating layer (60) covers the substrate (30). A connection part (40c) of the wiringpattern (40) is exposed from the insulating layer (60). A pedestal (12) for mark is formedon the substrate (30). An alignment mark (20) is formed on a top part (12b) of thepedestal (12) for mark. The alignment mark (20) is formed in a shape in which a length ofa horizontal direction and a length of a vertical direction are respectively longer than alength of a horizontal direction and a length of a vertical direction of the top part (12b)of the pedestal (12) for mark and a shape in which an area present in the top part (12b) ofthe pedestal (12) for mark is smaller than an area of the top part (12b) of the pedestal
(12) for mark. An upper surface part of the alignment mark (20) is exposed from theinsulating layer (60).
申请人：Shinko Electric Industries Co., Ltd.
地址：80, Oshimada-machi Nagano-shi, Nagano 381-2287 JP
国籍：JP
代理机构：Zimmermann & Partner
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