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User Guide
AT91SAM7A1-EK Evaluation Board User Guide6114A–ATARM–09/04
Table of Contents
Section 1
Overview...............................................................................................1-1
1.11.21.3
Scope........................................................................................................1-1Deliverables..............................................................................................1-1AT91SAM7A1 Evaluation Board...............................................................1-1
Section 2
Setting Up the AT91SAM7A1-EK Evaluation Board.............................2-1
2.12.22.32.42.52.62.7
Requirements............................................................................................2-1Electrostatic Warning................................................................................2-1Layout.......................................................................................................2-1Voltage......................................................................................................2-2Powering Up the Board.............................................................................2-2Measuring Current Consumption on the AT91SAM7A1...........................2-2AT91SAM7A1-EK Block Diagram.............................................................2-3
Section 3
Board Description.................................................................................3-1
3.13.23.33.43.53.63.73.83.93.103.113.12
AT91SAM7A1-EK Top Level.....................................................................3-1AT91SAM7A1 Processor..........................................................................3-1Power Supply Block..................................................................................3-1Application Interface.................................................................................3-2CAN Bus...................................................................................................3-2LIN Buses and RS-232 Lines....................................................................3-3Crystal Oscillators and Clock Distribution.................................................3-5Memory Organization................................................................................3-5I/O Expansion...........................................................................................3-6External Bus Interface...............................................................................3-6ICE Interface.............................................................................................3-7Default Strap Configuration.......................................................................3-7
Section 4
Schematics...........................................................................................4-1
4.1
Schematics...............................................................................................4-1
AT91SAM7A1-EK Evaluation Board User Guidei
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Table of Contents
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AT91SAM7A1-EK Evaluation Board User GuideSection 1Overview
1.1Scope
The AT91SAM7A1-EK Evaluation Board enables real-time code development and evalu-ation. It supports the AT91SAM7A1 microcontroller.
1.2Deliverables
The evaluation board is supplied with:
an AT91SAM7A1 evaluation board called the AT91SAM7A1-EKa bare power lead, a fuse, 2 jumpersa 25-pin parallel cablethe AT91 CD-ROM including:
–Summary and full datasheets, datasheets with electrical and mechanicalcharacteristics–Application notes and Getting Started documents for all development boardsand AT91 microcontrollers–An AT91 Software package with C and assembly listings is also provided. Thisallows the user to begin evaluating the AT91 ARM® Thumb® 32-bitmicrocontroller quickly.
1.3
The board consists of:AT91SAM7A1
Evaluation BoardThe Atmel AT91SAM7A1 ARM-based microcontroller
Memories
–512 Kbyte 16-bit/8-bit SRAM–2 Mbyte 16-bit Flash
Footprint for an 8 Kbyte SPI EEPROM Communications interface
–1 CAN port wired on SubD9 connector–2 LIN ports and 1 RS232 interface–1 LIN port and 2 RS232 interfaces
–1 LIN port and 1 RS232 modem-compliant interface
AT91SAM7A1-EK Evaluation Board User Guide1-1
6114A–ATARM–09/04
Main machine interfaces
–1 LCD (2 lines x 16 characters with backlight)–1 reset push button–1 piezoelectric buzzer
–3 LEDs connected to the PIO/Timer module–3 programmable push buttons Miscellaneous
–Current measurement possibility–Temperature measurement–Contrast voltage measurement–Configurable straps for flexibilityICE interface
–A standard 20-pin ICE interface connector
–An embedded ICE Interface linked to SubD25 connector Power supply features
–DC power line filtering–Diode bridge
–Adjustable voltage regulators Clocks
–6 MHz and 32.768 KHz crystalsExpansion connectors
–Most chip I/Os accessible via two 50-pin connectors (J17, J18)
–EBI expansion connector allowing plug-in of memory board or Ethernet board
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AT91SAM7A1-EK Evaluation Board User GuideSection 2
Setting Up the AT91SAM7A1-EK
Evaluation Board
2.1Requirements
In order to set up the AT91SAM7A1-EK Evaluation Board, the following elements arerequired:
the AT91SAM7A1-EK Evaluation Board itself
a DC power supply capable of supplying 7V to 12V @ 400 mA (not supplied)
2.2
Electrostatic Warning
The AT91SAM7A1-EK Evaluation Board is shipped in protective anti-static packaging.The board must not be subjected to high electrostatic potentials. A grounding strap orsimilar protective device should be worn when handling the board. Avoid touching thecomponent pins or any other metallic element.
2.3Layout
Figure 2-1. Top Level Layout
AT91SAM7A1-EK Evaluation Board User Guide2-1
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2.4Voltage
DC power is supplied to the board via the 2.1 mm connector (J1) shown in Figure 2-2.The polarity of the power supply is not critical. The minimum voltage required is 7V. Thesupply must be isolated from ground. The 0 volts of the on-board regulated supplies canbe connected to ground via any one of the 4 test points, TP1 to TP4.Figure 2-2. 2.1mm Connector
Positive (+) orNegative(-)The board has a voltage regulator providing +3.3V and another providing +5V. Theseregulators allow the input voltage to be from 7V to 12V.
2.5
Powering Up the Figure 2-3. Powering Up the BoardBoard
Switch the power onThe red LED marked\"DS1\" lights upNoSwitch off, check thefuse and the powersupply connectionsYesEnd2.6
Measuring Current
Consumption on the AT91SAM7A1
The board is designed to generate the entire power supply of the AT91SAM7A1 device.The PCB power tracks to the ARM7 core, the I/O and the analog cells are independent.This feature enables measurement of the current consumption of the different majorparts of the AT91SAM7A1 device.
Table 2-1. Current Consumption Measurement Procedure
Block to Measure
CoreAnalog CellsI/O Cells
Strap to Unsolder
E1E2E3
Connect an ammeter in place
of the strap
Action
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AT91SAM7A1-EK Evaluation Board User Guide2.7
AT91SAM7A1-EK Block Diagram
Figure 2-4. AT91SAM7A1-EK Evaluation Board Block Diagram
AT91SAM7A1 MicrocontrollerEBI Expansion ConnectorJTAG ConnectorICE EmbeddedConnectorEmbeddedICEARM7TDMICoreEBISRAMFlash32.768 kHzCrystalOscAMBAOscPLL6 MHzCrystalVoltageDetectorPushbuttonResetWatch TimerWatchdogSerial EEPROM2 Simple TimersGenericInterruptControllerCANI/O Expansion ConnectorSPIButtonUSART1LINDriverLINDriverRS-232DriverRS-232DriverDB9ConnectorDB9ConnectorCAPT2 ChannelsUSART2GPTCH0I/O Expansion ConnectorDB9ConnectorCANDriverUSART0BuzzerContrast ControlPWM4 ChannelsCH1CH2LEDsButtonsLCDPIO8-channel10-bitADCVoltage ReferenceGeneratorVoltageMeasurementsAT91SAM7A1-EK Evaluation Board User Guide2-36114A–ATARM–09/04
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AT91SAM7A1-EK Evaluation Board User GuideSection 3
Board Description
3.1
AT91SAM7A1-EK The AT91SAM7A1-EK evaluation board consists of eight main blocks. Each block is
described in the sections that follow. Top Level
The block diagram is shown in Figure 2-4.
3.2
AT91SAM7A1
Processor
The processor is based on an ARM7TDMI® 32-bit core and providesStandard modules (e.g., timers and USART)Specific modules (e.g., CAN)
The footprint is for a 144-pin TQFP package.
The jumpers E1, E2 and E3 can be removed to allow measurement of the currentrequired by the microcontroller. For more details, refer to Figure 4-3.
3.3
Power Supply Block
The voltage regulator provides 3.3V, 5V and analog 3.3V to the board and lights the redLED when operating.
Power can be applied via the 2.1 mm connector to the regulator in either polaritybecause of the diode rectifying circuit.
The regulators can tolerate supply transients up to 30V although they shut down withoutdamage if they overheat.
The I/O power is configurable. Jumper J3 allows the selection of either 3.3V or 5V. Theboard also provides jumpers that measure the power of the microcontroller.
By unsoldering straps, an ammeter can be connected. Strap E1 is used to measure coreconsumption. Strap E3 is used to measure I/O cell consumption; the analog cell con-sumption is measured by jumper E2. For more details, refer to Figure 4-3.
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3.4
Application Interface
The board provides the following application interfaces:Table 3-1. Board Application Interfaces
Part
Description
Detects and then resets the board when the 3.3V supply voltage drops below 2.7V. Allows manual reset of both board and microcontroller.
Connected to timer (or I/O) pin TIOA0 (GPT module)
Connected to timer (or I/O) pin TIOA1 (GPT module)
Connected to timer (or I/O) pin TIOB0 (GPT module)
Connected to input pins TIOA2 and TIOB1 (or I/O) of the timer (GPT module)
Connected to GIC (Generic Interrupt
Controller) module IRQ0 input. Allows the user to generate interrupts manually.Connected to the PWM0 output. It demonstrates the PWM (Pulse Width Modulation) features. It is possible to
enable/disable the buzzer by opening/closing jumper J10. The PWM0 output signal can be a 3V3 or 5V (jumper J3). The voltage influences the volume of the sound.
Displays 2 lines of 16 characters each. The LCD is driven by the PIO which can be powered by 3V3 or 5V. The LCD tolerates these two voltages. Users can display
messages on the LCD. The contrast voltage is provided by the PWM1 and can be measured by ADC0 channel 0.
Reset push button
Red LED DS2 Orange LED DS3 Green LED DS4 SW2 push buttonSW3 push buttonSW4 push button
Buzzer
LCD connected to PIO
For more details, refer to Figure 4-3 and Figure 4-4.
3.5CAN Bus
The CAN0 module is connected to a female SubD9 connector (J7) via the CAN driverMN2.The pinout is described in Table 3-2.Figure 3-1. Female DB9 Connector
5948372613-26114A–ATARM–09/04
AT91SAM7A1-EK Evaluation Board User GuideTable 3-2. Pinout
SubD9 Pin
438others
FunctionCAN-LGNDCAN-HNot connected
The CAN bus resistive load is 60 Ohm. It is made up of two 120 Ohm resistors in paral-lel. The recommended CAN bus load is 60 Ohm. Depending on the external input busresistor, users can disconnect resistors to achieve the correct bus load. For more details, refer to Figure 4-5.
3.6
LIN Buses and RS-232 Lines
Via USART modules, the AT91SAM7A1-EK board provides the following:2 LIN buses and 1 RS-232 lineor
1 LIN bus and 2 RS-232 linesor
2 LIN and 1 RS-232 modem-compliant interfacesTable 3-3. 2 LIN Buses and 1 RS-232 Interface
Communication
Type
LINLINRS232
Connector
J19J4J8
AT91SAM7A1 PeripheralUSART1USART0USART2
Closed Straps No strapE9: 3 - 4J9
Open StrapsNo strapE9: 2 - 3
Table 3-4. 1 LIN Bus and 2 RS-232 Interfaces
Communication
Type
LIN
Connector
J19
AT91SAM7A1 PeripheralUSART1
Closed Straps No strapE9: 2 - 3
RS232
J6
USART0
E16: 2 -3E5: 2 -3E6: 2 -3
RS232
J8
USART2
J9
Open StrapsNo strapE9: 3 - 4E16: 1 - 2E5: 1 - 2E6: 1 - 2
AT91SAM7A1-EK Evaluation Board User Guide3-36114A–ATARM–09/04
Table 3-5. 2 LIN Buses and 1 RS-232 Modem-compliant Interface
Communication
Type
LINLIN
Connector
J19J4
AT91SAM7A1 PeripheralUSART1USART0USART2
Closed Straps No strapE9: 3 - 4J9E16: 1 - 2
RS232 Modem
J8
UPIO
E9: 1 - 2E5: 1 - 2E6: 1 - 2
E16: 2 - 3E16: 2 -3E5: 2 -3E6: 2 -3Open StrapsNo strapE9: 2 - 3
Note:
The UPIO[5:0] are shared between the LCD interface and the RS-232 driver MN1. To avoid signal conflicts, these two devices should not be used at the same time.
The RS-232 interfaces are connected to two SubD9 male connectors:Connector J6 for the simple RS-232 interface (RX/TX)
Connector J8 for the RS-232 modem-compliant interface (RX/TX/DSR/CTS, etc.)The pinout for the DB9 connector J6 used by the USART0 is described in Table 3-6. Table 3-6. J6 Pinout
J6 Pin235Others
Note:
FunctionRX (Receive Data)TX (Transmit Data)
GroundNot connected
AT91SAM7A1 Pin (1)
RXD0TXD0GNDNot connected
1.Depends on the strap configuration.
The pinout for the DB9 connector J8 used by the USART0, USART2 and UPIO[5:0] isdescribed in Table 3-7. Table 3-7. J8 Pinout
J8 Pin1234567
Note:
FunctionCD (Carrier Detect)RX (Receive Data)TX (Transmit Data)DTR (Data Terminal Ready)
Ground
DSR (Data Set Ready)RTS (Request to Send)CTS (Clear to Send)RI (Ring Indicator)
AT91SAM7A1 Pin (1)
UPIO1/RXD0
RXD2TXD2UPIO0/TXD0
GNDUPIO3UPIO2UPIO4UPIO5
1.Depends on the strap configuration.
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AT91SAM7A1-EK Evaluation Board User GuideNote:
Depending on the strap configuration, either SubD9 pin 1 or 4 can be controlled by UPIO or by USART0 pins.
The schematic of these connectors is the same as the one used by the CAN0 module (see Section 3.5).
The LIN interfaces are connected to two three-pin header connectors:Connector J19Connector J4
The pinout for the connector J19 used by the USART1 is described Table 3-8. Table 3-8. J19 Pinout
J19 Pin123
Note:
FunctionVs (8V - 18V)
LIN (Local Interconnect Network)
TXD1/RXD1AT91SAM7A1 Pin (1)
Ground GND1.Depends on the strap configuration.
The pin-out for the connector J4 used by the USART0 is described Table 3-9. Table 3-9. J4 Pinout
J4 Pin123
Note:
FunctionVs (8V - 18V)
LIN (Local Interconnect Network)
Ground
TXD0/RXD0
GND
AT91SAM7A1 Pin (1)
1.Depends on the strap configuration.
Figure 3-2. Male DB9 Connector
162738495For more details, refer to Figure 4-6.
3.7
Crystal
Oscillators and Clock
Distribution
The system clock is derived from a 6 MHz crystal oscillator mounted on-board. At reset,the on-chip PLL-based frequency multiplier is disabled, using the frequency of the crys-tal oscillator as the default master clock. The low-frequency clock used for the low-power mode, the Watchtimer module and the Watchdog module can be leaded by a 32kHz crystal oscillator or a division of the 6 MHz crystal oscillator. At reset, the low-fre-quency clock is configured on the 32 kHz crystal oscillator mounted on-board.For more details, refer to Figure 4-2.
3.8
Memory
Organization
The Flash memory is an AT49BV1614A (1Mx16-bit). Write-protection for half of the on-board Flash memory is provided. Output 2 of Jumper J15 drives the address pin 20 ofthe Flash.
To access the whole memory, put a jumper in J5: 1 - 2.
AT91SAM7A1-EK Evaluation Board User Guide3-56114A–ATARM–09/04
To protect the upper memory and access only the lower memory (from 0x40000000 to0x40080000: only 1 Mbyte), put a jumper in J5: 2 - 3.
To protect the lower memory and access only the upper memory (from 0x40080000 to0x40100000: only 1 Mbyte), close the jumper from J5: 2 - 3.The mapping defined by the boot software is shown in Table 3-10. Table 3-10. Memory Mapping
ElementFlashSRAM
Address0x400000000x48000000
3.9I/O Expansion
Two I/O expansion connectors (J17 and J18) provide the users with the general-pur-pose I/O (GPIO) lines, analog lines, VDD and ground. The connectors are not fitted atthe factory; however, the user can fit any 2 x 25 connector on a 0.1\" (2.54 mm) pitch. Forconnector pin-out details, see Figure 4-10.
3.10
External Bus Interface
Figure 4-8 shows one 2 MByte 16-bit Flash (AT49BV1614A-90TC) and a 512 Kbyte 16-bit SRAM device (Alliance AS7C34098-10TC or equivalent).
Figure 4-9 shows the bus expansion connector (J16) that, like the I/O expansion con-nector (J17 and J18), is not fitted at the factory. The user can fit any 32 x 2 connector ona 0.1\" (2.54 mm) pitch to gain access to the data, address, chip select, read/write, oscil-lator output and wait state pins. VDD and ground are available on the connector.On-board jumpers (J13, J14 and J15) allow the user to connect Chip Selects either toon-board memories or to the expansion connector.In most case, jumpers should be set up as in Table 3-11. Table 3-11. Board Jumper Configuration
JumperJ13
Jumper Configuration
1 - 2 closed1 - 2 left open
J14
1 - 2 closed1 - 2 left open
J15
1 - 2 closed2 - 3 left open1 - 2 left open2 - 3 closed1 - 2 left open2 - 3 left open
Description
On-board Flash driven by NCS0On-board Flash always de-selectedOn-board SRAM driven by NCS1On-board SRAM always de-selectedOn-board Flash address line 20 is driven. User can access the whole
memory space.On-board Flash upper memory protected. User can access only the 1
Mbyte lower space.On-board Flash lower memory protected. User can access only the 1
Mbyte upper space.
3-66114A–ATARM–09/04
AT91SAM7A1-EK Evaluation Board User Guide3.11ICE Interface
An ARM®-standard 20-pin box header (J11) is provided to enable connection of an ICEinterface to the JTAG inputs on the AT91SAM7A1 device. This allows code to be devel-oped on the board without the use of system resources such as memory and serialports. A mini ICE interface is embedded on the board. It is accessed by a parallel portconnector (J12).
Note:To use a standard external ICE interface in target powered mode, it is neces-sary to close the strap E25 that enables the VCC power supply on the JTAG port.For more details, refer to Figure 4-7.
3.12
Default Strap Configuration
Table 3-12. Default Strap Configuration
Schematic
Strap/Jumper
E1E2E3
Figure 4-3
J3E26E10E7
Figure 4-4
E8
Configuration
ClosedClosedClosed1 - 2 closed2 - 3 openClosed1 - 2 closed2 - 3 open1 - 2 closed2 - 3 open1 - 2 closed2 - 3 open2 - 3 closed1 - 2 open3 - 4 open2 - 3 closed1 - 2 open2 - 3 closed1 - 2 open2 - 3 closed1 - 2 openClosedClosedClosedClosed1 - 2 closed2 - 3 open
Power on the JTAG connectionNCS-FLASH connected to NCS0NCS-SRAM connected to NCS1Flash pin A19 connected to signal
A20/CS7 (whole memory
accessible)1 LIN and 2 RS-232 interfaces
Description
VDDCORE connected to VDDAVDDCORE connected to AVDDVDDIO connected to VDDPERIPHVDDPERIPH connected to VDDAGND connected to GNDMA2 EN_pin connected to
NRESETE4-1 (LCD pin 1) connected to
VDDPERIPHE4-2 (LCD pin 2) connected to
GND
E9
Figure 4-6
E16E5E6
Figure 4-7
J9E25J13J14
Figure 4-8
J15
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AT91SAM7A1-EK Evaluation Board User GuideSection 4Schematics
4.1Schematics
Table 4-1. AT91SAM7A1 Schematics
Figure Reference
Figure 4-1Figure 4-2Figure 4-3Figure 4-4Figure 4-5Figure 4-6Figure 4-7Figure 4-8Figure 4-9Figure 4-10
DenominationTop Level LayoutAT91SAM7A1
Power
Application InterfaceCAN InterfaceRS-232 and LIN Interface
ICE InterfaceMemoriesEBI ExpansionExpansion Connector
AT91SAM7A1-EK Evaluation Board User Guide4-1
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Figure 4-1. Components Side Assembly
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AT91SAM7A1-EK Evaluation Board User GuideFigure 4-2. AT91SAM7A1
AT91SAM7A1-EK Evaluation Board User GuideAT91SAM7A1AT91SAM7A14-36114A–ATARM–09/04
Figure 4-3. Power
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AT91SAM7A1-EK Evaluation Board User GuideFigure 4-4. Application Interface
AT91SAM7A1-EK Evaluation Board User Guide4-56114A–ATARM–09/04
Figure 4-5. CAN Interface
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AT91SAM7A1-EK Evaluation Board User GuideFigure 4-6. RS-232 and LIN Interfaces
AT91SAM7A1-EK Evaluation Board User Guide4-76114A–ATARM–09/04
Figure 4-7. ICE Interface
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AT91SAM7A1-EK Evaluation Board User GuideFigure 4-8. Memories
Note:1.AT479BV1614A-90TC can be replaced by AT49BV162A.
AT91SAM7A1-EK Evaluation Board User GuideAT49BV1614A-90TC(1)4-96114A–ATARM–09/04
Figure 4-9. EBI Expansion
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AT91SAM7A1-EK Evaluation Board User GuideFigure 4-10. Expansion Connector
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